The present invention relates to a method for producing a film chip having an integrated circuit, i.e. a circuit comprising a number of electronic components integrated into a common semiconductor body.
It has long been known to produce integrated circuits on the basis of substantially rigid semiconductor materials which predominantly originate from group IV of the periodic system or are combined materials from groups II and V of the periodic system. Known materials are, in particular, silicon, germanium, gallium arsenide and others. Using modern lithography process steps, it is possible to produce extremely fine structures in and on rigid semiconductor substrates from such materials. The lithography process steps typically comprise producing mask structures on the semiconductor substrate using exposure and etching steps and depositing and/or introducing impurity materials onto or into the semiconductor substrate. However, the lithography process technology is very complex and expensive with the result that the production of integrated circuits pays for itself only in the case of very large numbers and high integration densities. Nevertheless, the production of integrated circuits in rigid semiconductor materials using lithography process steps has become widely prevalent.
For some time, endeavors have also been made to use so-called organic semiconductor materials for producing electronic circuits. The electronic components are produced here predominantly, but not exclusively, from organic materials and/or on films composed of organic material, in particular polymer films. In general, the circuit structures are produced on such films using relatively cost-effective printing methods, which promises economic advantages over conventional semiconductor technology, particularly if the end product is intended to have a large area as in the case of graphical displays. The printing techniques generally lead to coarser structures in comparison with the very fine structures that can be produced with the “classic” lithography techniques on silicon and other rigid semiconductor materials. The two technologies, i.e. integrated semiconductor technology on the basis of silicon and other rigid semiconductor materials and organic electronics using printing techniques, are in a way complementary with regard to the costs of a circuit per area, the degree of integration and the performance of the circuit.
Therefore, it is desirable to combine the advantages of both technologies in a hybrid approach. This necessitates connecting an integrated circuit arranged on or in a rigid semiconductor substrate to an organic carrier material, which is generally flexible. Difficulties are posed here primarily by the electrical contact-connection of the filigree structures on the rigid semiconductor substrate, since the structures on the organic carrier material cannot be realized as finely using known printing techniques. On the other hand, conventional lithography processes presuppose rigid materials.
EP 0 452 506 B1 discloses a method for producing a flexible film piece, on which an integrated semiconductor circuit is arranged. In one exemplary embodiment, the flexible film piece is a polymer film. The film is provided on one side with an electrically conductive structure having pin-like projections in the region of the mounting location for the integrated semiconductor circuit. The projections pass through the film and protrude beyond the film on the second side of the film. They make contact there with so-called bonding pads, i.e. specific contact areas embodied in the edge region of the integrated semiconductor circuit. The semiconductor circuit is placed by the bonding pads onto the free ends of the pin-like projections and soldered. EP 0 452 506 B1 thus discloses a method for mechanically fixing and electrically contact-connecting a substantially rigid semiconductor chip on a flexible film piece. However, the known method requires relatively large contact areas on the semiconductor chip, i.e. contact areas which are significantly larger than the circuit structures of the individual components in the chip. Valuable chip area for the production of the integrated circuit structures is thus lost. The smaller the contact areas are made, the higher the complexity when positioning the semiconductor chip on the pin-like projections. These disadvantages have a particularly great effect if the semiconductor chip comprising the integrated circuit is e.g. a control or driver circuit for a large-area display that is intended to be realized using organic electronics on the flexible film piece. Such a control or driver circuit requires a very large number of contact areas, such that a relatively large chip area is required for contact-connection.
DE 42 28 274 A1 discloses a method for making contact with an optoelectronic component composed of a substantially rigid semiconductor material. In one exemplary embodiment, the component is a light emitting diode composed of gallium arsenide. The component is fixed, e.g. soldered or adhesively bonded, on a carrier body. Instead of known bonding wires, DE 42 28 274 A1 proposes arranging a polyimide film above the carrier body and the component, contact holes being introduced into said polyimide film. Afterward, a metal layer is deposited on the polyimide film, wherein the metal also penetrates into the contact holes and in this way electrically connects the component and the carrier body.